To see all available (enabled) optimization flags for your CPU type (with your GCC version) you can use:
gcc -c -Q -march=native -mtune=native --help=target
or the extended version:
gcc -v -Q -march=native --help=target
… and to get all compiler Flags which are used with your choosen optimization Flags you can test with:
gcc -march=<ARCH> [-mtune=<ARCH> -FLAGS] -E -v - < /dev/null 2>&1 | grep cc1
Best results will be received with the -march=native -mtune=native compiler flag that effectively means to use all available optimization flags for the local systems CPU architecture.
If you want to compile best optimized for a range of systems with diverent CPU architectures you can add a explicite architecture flag for the least common architecture you want to support.
| CPU generation | architecture flag | sup. since gcc version | Ubuntu 12.0 |
|---|---|---|---|
| Haswell iX-4xxx | -march=core-avx2 | (min. gcc 4.8) | |
| Ivy-Bridge iX-3xxx | -march=core-avx-i | (min. gcc 4.6) | not working right! use corei7-avx |
| Sandy-Bridge iX-2xxx | -march=corei7-avx | (min. gcc 4.6) | fully supported |
| Ironlake (Xeons?) | -march=corei7 | ←- preferable | |
| Core with SSE3 | -march=core2 |
Explanations and Flags for different CPUs and Instructionsets cann be found in the [http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html| online GCC documentation|_blank]
When compiling libraries as static, this lib.a can be linked static in shared libraries if they all are compiled with the -fPIC flag. (“Position Independent code”).
Supported optimized Parameters for all i5 (Sandy Bridge/Ivy Bridge).
-march=corei7-avx -mcx16 -msahf -mno-movbe -maes -mpclmul -mpopcnt -mno-abm -mno-lwp -mno-fma -mno-fma4 -mno-xop -mno-bmi -mno-tbm -mavx -msse4.2 -msse4.1 \ --param l1-cache-size=32 --param l1-cache-line-size=64 --param l2-cache-size=6144 -fstack-protector -mtune=corei7-avx
Parameters like corei7-avx-i, per description supported on Ivy Bridge, result in different unspecific Errors for example in Trilinos 11.4.3 and older .
Optimized Parameters for i5 Ivy Bridge (ww8stud*, ww8-2024-[1/2], ww8-2025-3, ww8-2027-2):
-march=core-avx-i -mcx16 -msahf -mno-movbe -maes -mpclmul -mpopcnt -mno-abm -mno-lwp -mno-fma -mno-fma4 -mno-xop -mno-bmi -mno-bmi2 -mno-tbm -mavx -mno-avx2 -msse4.2 -msse4.1 \ -mno-lzcnt -mno-rtm -mno-hle -mrdrnd -mf16c -mfsgsbase -mno-rdseed -mno-prfchw -mno-adx -mfxsr -mxsave -mxsaveopt --param l1-cache-size=32 --param l1-cache-line-size=64 --param l2-cache-size=6144 -mtune=core-avx-i